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FPGA Engineer

Primary responsibilities:

• Implement capacity upgrades and feature enhancements of MPLS and SONET protocol functionality for OCS' ITN system based on high-capacity FPGA technologies

Minimum requirements:

• A university degree in electrical engineering;
• At least 4 years of experience in designing FPGA/ASIC chips for networking equipment;
• Proficiency with Xilinx Virtex 4/5 FX FPGA technologies, including:
• Implementing, simulating and testing Rocket I/O transceivers for SONET signals
• Use of the embedded PPC core of the Virtex 4/5 FX chips
• Know-how of Xilinx ISE and EDK design tools and ModelSim simulator
• Knowledge and experience with the following:
• Verilog Hardware Description Language
• Design and simulation of SONET and MPLS protocol functionality in Verilog
• Embedded Linux OS
• Scripting languages, e.g. TCL
• Excellent architectural and documentation skills.